Design and FPGA Implementation of an Adaptive Demodulator

Signal Processing systems for communications will have to operate in rapidly changing environments. To suitably adapt to the varying requirements, control strategies targeted at selecting and tuning the signal processing algorithms need to be developed. The work being reported in this thesis is part of the bigger initiative by DARPA to develop and exploit reconfigurable computing for evolving defense systems. This work focuses on the use of automatic recognition of modulation type of the input signal to suitably reprogram the FPGA as a particular demodulator. The modulation schemes considered are PSK2 PSK4 and FSK2. This is used as a case study to demonstrate how reconfigurable computing can be a promising choice for building more adaptable and robust signal processing and communication systems. This thesis first surveys the existing algorithms of Automatic Modulation Recognition (AMR). These algorithms are briefly analyzed to consider the feasibility of implementing them in hardware. A novel algorithm of automatic modulation is proposed and its FPGA implementation discussed in detail. It is also discussed how the run-time reconfigurability offered by the FPGA can aid in building a universal demodulator. The complete design flow followed for synthesizing the designs for FPGAs is presented. Design and implementation details of the individual demodulators is discussed in great detail. Certain hardware optimizations that exploit the available FPGA architectures are documented. The test setup used for testing these radios is briefed. Finally all the demodulators and the modulation recognizer are integrated into a run-time reconfigurable set up. Results from testing are reported and discussed.